Modern integrated circuits are formed on semiconductor chips. To increase manufacturing throughput and to lower manufacturing costs, the integrated circuits are manufactured in semiconductor wafers, each containing many identical semiconductor chips. After the integrated circuits are manufactured, semiconductor chips are sawed from the wafers and packaged before they can be used.
In typical packaging processes, semiconductor chips or dies are first attached to package substrates. This includes physically securing the semiconductor chips on the package substrates, and connecting bond pads on the semiconductor chips to bond pads on the package substrates. Underfill, which typically comprises epoxy, is used to further secure the bonding. The semiconductor chips may be bonded using either flip-chip bonding or wire bonding.
After the semiconductor chips are bonded onto the package substrates, the solder regions that join the semiconductor chips with the package substrates often suffer from cracking. This is caused by the stress resulting from the difference in coefficients of thermal expansion (CTE) between the package substrates and the semiconductor chips. The difference in CTEs of different layers of the package substrates and the semiconductor chips also results in stresses. The increase in the size of the package substrates and the semiconductor chips results stress increase. As a result of the increased stresses, the solder cracking becomes more severe and delamination may occur between different layers of the semiconductor chips. Particularly, the delamination is likely to occur between low-k dielectric layers in the semiconductor chips.
To reduce the stress caused by the CTE difference between the package substrate and one or more dies a stiffener ring is typically placed on the package substrate around the die(s). FIG. 1 is a top view of a semiconductor package structure 5 with a stiffener ring 30 extending about a perimeter of substrate 20 and surrounding a plurality of dies D1, D2, D3, and D4 on the substrate 20. The stiffener ring 30 seals the dies D1, D2, D3, and D4 from moisture, provides a level of mechanical strength to the semiconductor package structure 5, and provides for global warpage control of the semiconductor package structure 5. Though stiffener ring 30 may provide global warpage control, it may not be sufficient to control local warpages in or around the areas of individual dies D1, D2, D3, and D4. Furthermore, where there is a large die D3 compared to the other dies D1, D2, and D4, the warpage around die D3 may not be adequately controlled by one stiffener ring 30.